Cambio el core axis_counter. Ahora si cuenta desde cero y hasta el final. Ya no tiene el reset

cores/axis_counter_v1_0/axis_counter.vhd

@@ -51,7 +51,8 @@ begin
   comp_next <= '0' when (cntr_reg = unsigned(cfg_data)-1) else '1';
 
   cntr_next <= cntr_reg + 1 when ((comp_reg = '1') and (m_axis_tready = '1')) else
-               (others => '0') when (comp_reg = '0') else --reset
+  --cntr_next <= cntr_reg + 1 when ((comp_reg = '1') and (m_axis_tready = '1')) else
+               --(others => '0') when (comp_reg = '0') else --reset
                cntr_reg;
 
   m_axis_tdata <= std_logic_vector(resize(cntr_reg, m_axis_tdata'length));

projects/adc_recorder/adc-recorder.c

@@ -10,72 +10,72 @@
 
 int main()
 {
-  int fd, i;
-  volatile uint8_t *rst;
-  volatile void *cfg;
-  volatile int16_t *ram;
-  uint32_t size;
-  int16_t value[2];
+	int fd, i;
+	volatile uint8_t *rst;
+	volatile void *cfg;
+	volatile int16_t *ram;
+	uint32_t size;
+	int16_t value[2];
 
-  if((fd = open("/dev/mem", O_RDWR)) < 0)
-  {
-    perror("open");
-    return EXIT_FAILURE;
-  }
+	if((fd = open("/dev/mem", O_RDWR)) < 0)
+	{
+		perror("open");
+		return EXIT_FAILURE;
+	}
 
-  cfg = mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x40000000);
+	cfg = mmap(NULL, sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0x40000000);
 
-  close(fd);
+	close(fd);
 
-  if((fd = open("/dev/cma", O_RDWR)) < 0)
-  {
-    perror("open");
-    return EXIT_FAILURE;
-  }
+	if((fd = open("/dev/cma", O_RDWR)) < 0)
+	{
+		perror("open");
+		return EXIT_FAILURE;
+	}
 
-  size = 1024*sysconf(_SC_PAGESIZE);
+	size = 1024*sysconf(_SC_PAGESIZE);
 
-  if(ioctl(fd, CMA_ALLOC, &size) < 0)
-  {
-    perror("ioctl");
-    return EXIT_FAILURE;
-  }
+	if(ioctl(fd, CMA_ALLOC, &size) < 0)
+	{
+		perror("ioctl");
+		return EXIT_FAILURE;
+	}
 
-  ram = mmap(NULL, 1024*sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+	ram = mmap(NULL, 1024*sysconf(_SC_PAGESIZE), PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
 
-  rst = (uint8_t *)(cfg + 0);
+	rst = (uint8_t *)(cfg + 0);
 
-  // set writer address
-  *(uint32_t *)(cfg + 4) = size;
+	// set writer address
+	*(uint32_t *)(cfg + 4) = size;
 
-  // set number of samples
-  *(uint32_t *)(cfg + 8) = 1024 * 1024 - 1;
+	// set number of samples
+	*(uint32_t *)(cfg + 8) = 1024 * 1024 - 1;
 
-  // reset writer
-  *rst &= ~4;
-  *rst |= 4;
+	// reset writer
+	*rst &= ~4;
+	*rst |= 4;
 
-  // reset fifo and filters
-  *rst &= ~1;
-  *rst |= 1;
+	// reset fifo and filters
+	*rst &= ~1;
+	*rst |= 1;
 
-  // wait 1 second
-  sleep(1);
+	// wait 1 second
+	sleep(1);
 
-  // reset packetizer
-  *rst &= ~2;
-  *rst |= 2;
+	// reset packetizer
+	*rst &= ~2;
+	*rst |= 2;
 
-  // wait 1 second
-  sleep(1);
+	// wait 1 second
+	sleep(1);
 
-  // print IN1 and IN2 samples
-  for(i = 0; i < 1024 * 1024; ++i)
-  {
-    value[0] = ram[2 * i + 0];
-    value[1] = ram[2 * i + 1];
-    printf("%5d %5d\n", value[0], value[1]);
-  }
+	// print IN1 and IN2 samples
+	for(i = 0; i < 1024 * 1024; ++i)
+	{
+		value[0] = ram[2 * i + 0];
+		value[1] = ram[2 * i + 1];
+		printf("%5d %5d\n", value[0], value[1]);
+	}
 
-  return EXIT_SUCCESS;
+	return EXIT_SUCCESS;
 }