diff --git a/projects/base_system/block_design.tcl b/projects/base_system/block_design.tcl
index 437efc5e408b880b9426784659a3991e4354fdd2..583d70490bccbee5a638559989d26a4607f51209 100644
--- a/projects/base_system/block_design.tcl
+++ b/projects/base_system/block_design.tcl
@@ -17,7 +17,7 @@ apply_bd_automation -rule xilinx.com:bd_rule:processing_system7 -config {
 # PLL
 
 # Create clk_wiz
-cell xilinx.com:ip:clk_wiz:5.3 pll_0 {
+cell xilinx.com:ip:clk_wiz pll_0 {
   PRIMITIVE PLL
   PRIM_IN_FREQ.VALUE_SRC USER
   PRIM_IN_FREQ 125.0